Iterative turbo decoder with single memory
US7480846B2 · kind B2 · utility
2Cited by
8References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2003 |
| Grant date | Jan 20, 2009 |
| Priority date | — |
| Expiry date | May 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6563
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to the domain of turbo decoders. Such a decoder comprises a first decoder (14) and a second decoder (16), each decoder being able to calculate extrinsic output data from extrinsic input data coming from the other decoder. The decoding circuit according to the invention comprises a single memory (31) for storing the extrinsic data. When a decoder calculates an extrinsic output data from an extrinsic input data coming from the other decoder and stored in the single memory at a certain address, this extrinsic output data is then written at this same address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.