Device for improving amplitude imbalance of on-chip transformer balun
US7482904B2 · kind B2 · utility
13Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2006 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Oct 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F27/34
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An on-chip transformer balun includes a primary winding as an input terminal of the on-chip transformer balun, and a secondary winding as an output terminal of the on-chip transformer balun, wherein one of the primary winding and secondary winding is formed of a plurality of metal layers in which a spiral trace portion excluding an underpass is disposed on mutually different layers to have an asymmetrical structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.