Digital feedthrough cancellation
US7482961B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2007 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Jun 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for operating a DAC to minimize digital feedthrough includes inputting a clock signal to a DAC clock input, the clock signal having a periodic series of trigger events, wherein input data must be present for a time window between a setup time before a trigger event and a hold time after the trigger event; generating an input data stream, the input data stream having data that is present for the time window; altering the input data stream into a cancellation data stream wherein the data presence is maintained but pseudo-data outside of the time window is added; and applying the cancellation data stream to a DAC data input resulting in an analog signal output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.