Multiple planar inductive loop surge suppressor
US7483251B2 · kind B2 · utility
3Cited by
18References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2006 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Dec 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R2103/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An in-line surge suppressor having a body with a bore. The body formed from a first portion and a second portion dimensioned to couple together. An inner conductor positioned within the bore and a shorting element extending between the inner conductor and the body. The shorting element having at least two loop segments, each of the loop segments arranged in a separate plane. Each of the loop segments interconnected with at least one other loop segment by a transition section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.