Method and system for link-based clock synchronization in asynchronous networks
US7483450B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2002 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Jan 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/0087
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method for clock synchronization in a network having one or more asynchronous data links is provided. A clock signal is propagated through, at the physical layer, a sequence of network devices linking a source network device to a destination network device of the network. Each asynchronous data link between the source network device and the destination network device is adapted to receive an incoming clock signal from the previous network device and then provide a clock signal synchronized to the received clock signal to the next network device of the sequence. At the same time, each network device of an asynchronous segment of the network can continue to transmit packets of data asynchronously. By locking the link-based frequency on a per link bases, the receiver clocks located at the edge of a network can be tied directly to a primary source located in the core network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.