Fault tolerant computer system
US7484032B2 · kind B2 · utility
8Cited by
12References
19Claims
0Family size
Inventor
Key dates
| Filing date | Jun 30, 2005 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Feb 12, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1666
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing hardware and software device called a Meta Mentor Central Processing Unit. The Meta Mentor purpose is to control memory, input/output interfaces, defining the operating system, the scheduling processes and the parsing of individual threads to an array of slave Processing Units that are uniquely connected, thus creating a highly optimized computing core. In effect, the Meta Mentor tells the array of slave processors what to process by controlling all external and internal system input/output and individual processor scheduling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.