Method and apparatus for protecting designs in SRAM-based programmable logic devices
US7484081B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2001 |
| Grant date | Jan 27, 2009 |
| Priority date | — |
| Expiry date | Oct 22, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various techniques for controlling use of configuration data for and/or a design implemented as user logic in a configurable PLD (programmable logic device) include programming the configurable PLD using configuration data provided by a secure device. The programmed configurable PLD includes user logic, a configurable device authorization code generator and a comparator. The user logic is immediately disabled after it is loaded into the configurable device. A configurable device authorization code is generated in the configurable device authorization code generator in the programmed configurable PLD and is sent to the comparator. A secure device authorization code is generated by a secure device authorization code generator and also is sent to the comparator. The comparator compares the two inputs and, if the configurable device authorization code and secure device authorization code are identical, the user logic is then enabled. The configurable device authorization codes and secure device authorization codes may be generated in various ways, including using pseudo-random number generators, encryptors and/or decryptors in combination in the configurable device and the secure devic…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.