System and method for power amplifier output power control
US7486137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2007 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Mar 18, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/99
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An architecture for detecting amplifier power is provided. The architecture includes a voltage envelope detector that receives a voltage signal and generates a voltage envelope signal. A current envelope detector receives a current signal and generates a current envelope signal. A power amplifier level controller receives the greater of the voltage envelope signal and the current envelope signal, such as by connecting the output of the voltage envelope detector and the current envelope detector at a common point and conducting the high frequency current components to ground via a capacitor. A power amplifier level control signal is then generated based on the voltage drop across the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.