Algorithm and system for selecting acknowledgments from an array of collapsed VOQ's
US7486683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2004 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Feb 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/201
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for selecting packets to be switched in a collapsed virtual output queuing array (cVOQ) switch core, using a request/acknowledge mechanism. According to the method, an efficient set of virtual output queues (at most one virtual output queue per ingress adapter) is selected, while keeping the algorithm simple enough to allow its implementation in fast state machines. For determining a set of virtual output queues that are each authorized to send a packet, the algorithm is based upon degrees of freedom characterizing states of ingress and egress adapters. For example, the degree of freedom, derived from the collapsed virtual output queuing array, could represent the number of egress ports to which an ingress port may send packet, or the number of ingress ports from which an egress port may receive packets, at a given time. Analyzing all the ingress ports holding at least one data packet, from the lesser degree of freedom to the greater degree of freedom, the algorithm determines as many virtual output queues as possible, in the limit of the number of ingress ports (an ingress port may send only one packet per packet-cycle).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.