Time slot protocol
US7486693B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2002 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Jun 23, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/4028
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A computing network uses Time Division Multiplexing (TDM) to divide the time on a bus into a plurality of frames, each frame having a plurality of time slots. Each time slot is assigned no more than one of the plurality of devices within a collision domain, the assignments indicating the identity of the device permitted to transmit packets onto the network during the assigned time slot. A bus cadence unit simultaneously sends an epoch packet initiating the frame. The epoch packet contains a time slot assignment table containing the time slot assignments, the device identification, as well as a time slot offset and duration. Each device on the network is configured to measure a frame interval between repeating epoch packets. The measured frame interval is further processed in each receiving node to obtain a calibrated frame interval. The calibrated frame interval is used to accurately synchronize transmissions of data from the various devices onto the network. A time slot protocol governor in each node controls access to the bus to only the assigned time slot or slots using the calibrated frame interval to reduce or eliminate synchronization errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.