Optical driver including a multiphase clock generator having a delay locked loop (DLL), optimized for gigahertz frequencies
US7486757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2005 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Nov 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0891
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An optical (disc) driving system including the DLL based multiphase clock generator circuit capable of generating 32 different phases from input clock having a frequency of 800 MHz or greater. The multiphase clock generator includes on a delay locked loop (DLL) having a frequency divider for outputting an N-divided clock to a first set of M voltage-controlled delay cells within a feedback loop, and further including an identical set of M voltage-controlled delay cells outside of the feedback loop for delaying the undivided clock and for outputting M multiphase clocks.An optical driver circuit of an optical driving system and a method for implementing a write-strategy for preventing “overlapping” of marks written on adjacent grooves on an optical disc. The circuit and method produce multiple write-strategy waveforms (channels) switching at a high resolution (e.g., T/32) in the Gigahertz frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.