Methods for thermal management of three-dimensional integrated circuits
US7487012B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2007 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Jun 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05D23/1932
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method of dynamic thermal management in a multi-dimensional integrated circuit or device is provided. The method includes monitoring on-chip temperatures, power dissipation, and performance of device layers. The method includes comparing on-chip temperatures to thermal thresholds, on-chip power dissipation to power thresholds and on-chip performance to performance thresholds. Also, the method includes analyzing interactions between temperatures, power, and performance of different device layers within the multi-dimensional integrated circuits. The method includes activating layer-specific thermal and power management within performance constraints on one or more device layers through actuators in the corresponding device layers, depending on the severity of heating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.