Archive and restore system and methodology for on-line edits utilizing non-volatile buffering
US7487316B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2001 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Jan 14, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/24137
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a system and methodology to mitigate memory current requirements in an industrial controller and to facilitate efficient on-line editing, storage and retrieval of user programs and data. A segmented memory architecture is provided, wherein a first memory segment is loaded with programmed instructions and other data that is relatively static in nature. A second memory segment is provided for storage of dynamic information such as controller data table variables that change frequently and/or rapidly during program execution of the controller. An execution memory is concurrently loaded with the user program to facilitate high performance program execution and to enable on-line edits of the user program during operation of the controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.