Memory module testing apparatus and method of testing memory modules
US7487413B2 · kind B2 · utility
4Cited by
3References
25Claims
0Family size
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Key dates
| Filing date | Apr 6, 2006 |
| Grant date | Feb 3, 2009 |
| Priority date | — |
| Expiry date | Mar 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module testing apparatus and method include a test slot adapted to receive a target memory module, wherein the target memory module includes a first memory unit to store information related to the target memory module. The memory module testing apparatus further includes a second memory unit adapted to store information related to a memory module, and a first switching unit adapted to selectively provide a driving signal to at least one of the first memory unit and the second memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.