Thin film transistor array substrate having scan or data lines extending to peripheral area without exceeding respectively outmost data and scan lines for reducing electrostatic discharge damage
US7489366B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2005 |
| Grant date | Feb 10, 2009 |
| Priority date | — |
| Expiry date | Feb 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A thin film transistor (TFT) array substrate for reducing electrostatic discharge damage includes a substrate, a plurality of pixel units, scan lines and data lines. The substrate has a pixel area and a peripheral area adjacent to the pixel area. The pixel units are disposed in the pixel area. The scan lines and data lines are disposed in the pixel area of the substrate and electrically connected with the pixel units, wherein one end of each scan line extending to the peripheral area is a bonding pad for the scan line. One end of each data line extending to the peripheral area is a bonding pad for the data line. The other end of each data line extending to the peripheral area is an end part of the data line. Particularly, the end part of the data line does not exceed the outmost scan line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.