Patent · US Active

Semiconductor storage device

US7489576B2 · kind B2 · utility

8Cited by
3References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 22, 2007
Grant dateFeb 10, 2009
Priority date
Expiry dateMar 22, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2207/065
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor storage device has first and second cell arrays including a plurality of memory cells to store data, a sense amplifier selectively connected with either one of the first and second cell arrays, a first precharge circuit to set a pair of bit lines in the first cell array to a predetermined voltage, a second precharge circuit to set a pair of bit lines in the second cell array to a predetermined voltage, a first switch circuit to connect the sense amplifier with the first cell array, a second switch circuit to connect the sense amplifier with the second cell array, and a switch controller to control conductive state of the first and second switch circuits. In non-selection state where the sense amplifier does not access any of the cell arrays, the switch controller controls one of the switch circuits into conducting state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.