Apparatus, system and method for implementing a generalized queue pair in a system area network
US7493409B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2003 |
| Grant date | Feb 17, 2009 |
| Priority date | — |
| Expiry date | Apr 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/329
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention provides an apparatus, system and method for providing a generalized queue pair for use with host channel adapters of a system area network. With the apparatus, system and method, the hypervisor of a host channel adapter maintains a P_Key table for each logical port of the host channel adapter. When a request is received to allocate a queue pair from a requestor application associated with a logical port, a P_Key mode is set in a control register associated with the queue pair based on the type of requestor application that sent the request. Based on this P_Key mode, one or more P_Keys from a P_Key table associated with the logical port from which the request was received are written to one or more P_Key registers allocated to the queue pair. These P_Keys are then used to perform P_Key checks of incoming data packets. In addition, these P_Keys are inserted into headers of outgoing data packets. In a preferred embodiment, the P_Key modes may be a single P_Key check mode, a multiple P_Key check mode, and a P_Key check disabled mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.