Back side wafer dicing
US7494900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2006 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Oct 11, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67092
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
Systems and methods for scribing a semiconductor wafer with reduced or no damage or debris to or on individual integrated circuits caused by the scribing process. The semiconductor wafer is scribed from a back side thereof. In one embodiment, the back side of the wafer is scribed following a back side grinding process but prior to removal of back side grinding tape. Thus, debris generated from the scribing process is prevented from being deposited on a top surface of the wafer. To determine the location of dicing lanes or streets relative to the back side of the wafer, the top side of the wafer is illuminated with a light configured to pass through the grinding tape and the wafer. The light is detected from the back side of the wafer, and the streets are mapped relative to the back side. The back side of the wafer is then cut with a saw or laser.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.