Negative feedback circuit and method and apparatus for implementing on-chip impedance matching for transmission line by using same
US7495470B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2007 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Nov 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/56
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A negative feedback circuit including: a voltage follower for making the output voltage follow a reference voltage, a proportional current mirror for outputting a current in proportion to a reference current via a reference resistor as a input current of the proportional current mirror, a comparison arbiter for comparing the voltage across the reference resistor and the voltage across a first variable resistor to acquire a regulating signal, inputting the regulating signal to the third regulating end of the first variable resistor and inputting the regulating signal to the third regulating end of a second variable resistor to synchronously regulate the resistances of the first and second variable resistors and thus make the resistances of the first and second variable resistors equal to the desired terminating resistance. The present invention also discloses a method and apparatus for performing on-chip impedance matching for a transmission line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.