Patent · US Active

Asymmetrical random access memory cell, memory comprising asymmetrical memory cells and method to operate such a memory

US7495949B2 · kind B2 · utility

3Cited by

2References

11Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Stefan Buettner · Markgröningen, DE
Torsten Mahnke · Stuttgart, DE
Wolfgang Penth · Holzgerlingen, DE
Otto Wagner · Edenkoben, DE

Key dates

Filing date	Jan 31, 2007
Grant date	Feb 24, 2009
Priority date	—
Expiry date	May 12, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/412
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An asymmetrical random access memory cell (1) including cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (blt, blc) of a pair of complementary bit-lines, which are connected via a pass-transistors (21, 31), wherein said cross coupled inverters (2, 3) have different switching thresholds and exhibit asymmetrical physical behaviours, wherein an additional pass-transistor (4) is provided in series to one of the pass-transistors (21) between one of the nodes (22) and its dedicated bit-line (blc). Further the invention relates to a random access memory including such memory cells and to a method of operating such a memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.