Method of maximizing bandwidth efficiency in a protocol processor
US7496109B1 · kind B1 · utility
12Cited by
14References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2004 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Aug 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/90
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A packet processing system including an encapsulator engine, and a packet pre-processor coupled to the encapsulator engine. The packet pre-processor calculates a variation between an input data rate and a pre-determined output data rate. The input data rate is based on a number of data read requests. The packet pre-processor compensates for the variation by modifying the number of data read requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.