Boot read-only memory (ROM) configuration optimization
US7496708B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2006 |
| Grant date | Feb 24, 2009 |
| Priority date | — |
| Expiry date | Jan 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention address deficiencies of the art in respect to boot ROM handling and provide a method, system and computer program product for optimized boot ROM handling for I/O devices. In one embodiment of the invention, a ROM scan area optimization method can be provided. The method can include pre-processing multiple boot ROM images to determine memory space requirements in the ROM scan area for all of the boot ROM images. The method further can include partitioning the ROM scan area into multiple, different static portions and at least one dynamic paged portion. Finally, the method can include generating an optimal arrangement of the boot ROM images defining placement of some of the boot ROM images in corresponding ones of the static portions, and others of the boot ROM images in the dynamic paged portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.