Patent · US Active

Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate

US7498266B2 · kind B2 · utility

5Cited by
7References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 27, 2005
Grant dateMar 3, 2009
Priority date
Expiry dateAug 11, 2026

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB81B2203/0384
  • WIPO fieldMicro-structural and nano-technology
  • WIPO sectorChemistry

Abstract

A method for structuring of silicon substrates for microsystem technological device elements, wherein the silicon substrate is covered with an etching mask and wherein the structures are furnished with a predetermined etching profile in the micrometer region with side walls and an etching depth At. For the generation of a predetermined positive etching profile, the side walls of the structures are furnished with the defined slope angle β of from 60 degrees to 88 degrees relative to the etching bottom and the structures are generated with an etching depth At in the micrometer region. Initially an isotropic etching is performed such that a mask under etching u is generated, wherein the mask under etching u is formed approximately equal to the etching depth At. In the following the etching depth At is increased by anisotropic etching in one process with alternatingly successively following etching and polymerization steps, such that the mask under etching u remains constant and such that the etching front of the etching profile obtains a new course, wherein the side walls of the structure are covered with a polymer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.