Circuit arrangement and method for generating a square wave signal
US7498857B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2007 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Sep 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for generating a square wave signal (UN2) comprising a DC voltage source (UG), a driver stage (TS), which alternately connects a control node (SK) to ground (GND) or the DC voltage (UG), a diode (D1) and a first capacitor (C1), which are coupled in series between a first pole (P1) of the DC voltage source and the control node (SK). The circuit further comprises an output stage (AS) comprising a first transistor (TR1) and a second transistor (TR2), which are connected such that the output stage (AS) the transistors are alternately conductive. The transistors (TR1, TR2) are coupled in series between a connecting node (N1), formed between the diode (D1) and the first capacitor (C1), and the control node (SK). A connecting node (N2) between the first transistor (TR1) and the second transistor (TR2) forms an output terminal for emitting the square wave signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.