Impedance matching circuit, and semiconductor element and radio communication device using the same
US7498897B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 4, 2004 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Jan 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P5/02
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An impedance matching circuit, a semiconductor element and a radio communication device using the same, adjusting bandwidth while permitting it to be constructed on the semiconductor element by reducing its occupation area. Since a reactance compensating distributed constant line (31) compensates reactance (BL, XS) of a load (6) and a quarter-wave transmission line (32) and an impedance inverting distributed constant line (33) composing an impedance inverting circuit (K inverter or J inverter) corresponding to the degree of impedance (ZL, ZS) of the load (6) match the impedance (ZL, ZS) of the compensated load (6) and output the input signals (SI1, SI2) at the preset bandwidth, adjustment of bandwidth can be made while miniaturizing the impedance matching circuit (7a) by shortening the line length of the reactance compensating distributed constant line (31) and the quarter-wave transmission line (32).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.