Method for synchronizing processors following a memory hot plug event
US7500040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2007 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Mar 12, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for synchronizing processors during an assertion of a system management interrupt (SMI) in an information handling system including, for each processor, identifying whether the processor is an interrupt handling processor assigned to perform processing tasks necessary for resolving the SMI or a non-interrupt handling processor not assigned to perform the processing tasks necessary for resolving the SMI. The method further includes creating a task structure operable to cause non-interrupt handling processors to perform at least one task for each interrupt handling processor. The method further includes automatically performing the at least one task during the SMI for each non-interrupt handling processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.