Unit cell of semiconductor integrated circuit and wiring method and wiring program using unit cell
US7500211B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 23, 2006 |
| Grant date | Mar 3, 2009 |
| Priority date | — |
| Expiry date | Oct 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A unit cell of a semiconductor integrated circuit capable of improving wiring efficiency in layout of a functional circuit block or the like using a unit cell, and a wiring method and wiring program using the unit cell are provided. In a unit cell, auxiliary power wiring regions are formed with reference to grids that exist from a cell edge every basic cell width in the X-direction. Input signal terminals and an output signal terminal are each arranged so as to include at least one wiring connecting portion outside the auxiliary power wiring regions. This makes it possible to wire wiring other than signal wiring in the auxiliary power wiring region. When a functional circuit block is constructed by arranging unit cells in a matrix, auxiliary power wiring regions are formed at a pitch of the basic cell width, through the functional circuit block in the Y-direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.