System and method for providing contact etch selectivity using RIE lag dependence on contact aspect ratio
US7504340B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2004 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | Dec 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed for providing contact etch selectivity for the etching of a plurality of contact etch holes through a dielectric layer of an integrated circuit. The method comprises the steps of obtaining a value of the reactive ion etch (RIE) lag for the dielectric layer, and selecting different values for the diameters of the contact etch holes based upon the desired depths of the contact etch holes and on the value of the RIE lag for the dielectric layer. The invention also comprises a contact diameter application processor that is capable of using RIE lag data to calculate contact diameters for contact etch holes for a mask design layout of an integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.