Main board for backplane buses
US7505285B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2006 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | Sep 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0969
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A motherboard for backplane buses is provided that reduces noise due to entry of external signals into signal wiring which interconnects modules, or noise due to any external signals entering a power supply after being routed around the power supply.An EBG pattern formed up of two wiring regions different from each other in impedance is periodically disposed in at least three arrays as part of the power supply layer(s) constituting a microstripline structure (one layer adjacent to a signal layer is a power supply layer, and the other layer is interposed in air) or a stripline structure (both layers adjacent to a signal layer are power supply layers); the part of the power supply layer(s) not being involved in signal transmission between the modules on the motherboard for backplane buses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.