Patent · US Expired

Parallel pulse code modulation system and method

US7505395B2 · kind B2 · utility

22Cited by
9References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 19, 2004
Grant dateMar 17, 2009
Priority date
Expiry dateMay 26, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L25/4927
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

The present invention provides a parallel pulse code modulation system enabling the independent control of a plurality of groups of one or more electronic devices. A memory unit receives control data from an external source, and a multiplexer connected to the memory unit receives control data therefrom and organizes it into a serial data stream. A shift register connected to the multiplexer receives the serial data stream and translates groups of data into parallel data stream output, representing control parameters for a particular group of one or more electronic devices. A latch connected to the shift register and to the groups of electronic devices receives each parallel data stream output and sends a particular parallel data stream output to a corresponding group electronic devices. A logic sequencer provides sequencing and timing signals to the memory unit, the multiplexer, the shift register and the latch.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.