Accurate timing alignments for decision directed continuous time equalizers
US7505515B1 · kind B1 · utility
2Cited by
2References
13Claims
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Key dates
| Filing date | Apr 29, 2005 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | Sep 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03484
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.