Automatic mode setting and power ramp compensator for system power on conditions
US7505739B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2005 |
| Grant date | Mar 17, 2009 |
| Priority date | — |
| Expiry date | Mar 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/36
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A GPS receiver with automatic mode-setting and power ramping circuitry is disclosed. AGPS receiver in accordance with the present invention comprises a first switch network, comprising a plurality of transistors, a first plurality of circuit components, coupled to the first switch network, wherein the switch network selects paths through the circuit components to generate a Power On Signal (POS) and ramp power to the GPS receiver, a plurality of test points, coupled to circuitry within the GPS receiver, wherein the test points are used to test intermediate stages of output of the GPS receiver, a second plurality of circuit components, each circuit component coupled to a corresponding test point in a respective manner, wherein the circuit components create outputs used in initialization of the GPS receiver, and a second switch network, coupled between the circuitry in the GPS receiver and the plurality of test points, for selectively switching the plurality of test points from being used to test intermediate stages of output of the GPS receiver and creating outputs used in initialization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.