Fabrication process of a semiconductor device
US7507659B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2007 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Nov 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device has forming an opening defined by an inner wall surface in an insulation film, covering said inner wall surface with a Cu—Mn alloy layer, depositing a first Cu layer over said Cu—Mn alloy layer without exposing said Cu—Mn alloy layer to the air, depositing a second Cu layer over said first Cu layer and filling said opening with said second Cu layer, and forming a barrier layer over said inner wall surface as a result of a reaction between Mn in said Cu—Mn alloy layer and said insulation film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.