Pin electronics implemented system and method for reduced index time
US7508191B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Nov 1, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Nov 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31917
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for testing with an automated test equipment (ATE) includes a tester having first and second manipulator arms. The tester has a pin electronics card. The pin electronics card includes a tester channel for connecting to a single pin of a device under test. The pin electronics card also includes a muxing relay connected to the tester channel, a first lead of the muxing relay, for connecting to a single pin of a first device under test, and a second lead of the muxing relay, for connecting to a single pin of a second device under test. The muxing relay electrically switches from testing of the first device under test to testing of the second device under test, and vice versa. respectively, with negligible index time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.