Method for measuring stability margin at a node of a polyphase power grid
US7508224B2 · kind B2 · utility
13Cited by
4References
31Claims
0Family size
Inventor
Key dates
| Filing date | Mar 27, 2007 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Oct 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J3/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for measuring a stability margin at a node of a polyphase power grid injects suppressed-carrier stimulus into a node of the power grid by low-level amplitude modulation of the output voltage of a pre-exiting generator connected to the node. Response signals are obtained and product demodulated on a per-phase basis and summed in three-phase groups. Demodulated and summed responses contain signals that represent the suppressed-carrier impedance upstream and downstream of the stimulus injection point, and are processed to determine the stability margin at the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.