Impedance matching circuit with simultaneous shielding of parasitic effects for transceiver modules
US7509053B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2007 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Oct 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a transceiver, which simultaneously provides impedance matched transmission for radio frequency (RF) and shields against transmission losses due to parasitic effects includes identifying parasitic electromagnetic elements associated with an RF choke for a given placement on a substrate. RF lines are placed and dimensioned on the bench to form impedance matched RF lines wherein a portion of the RF lines shield the RF choke for a given bandwidth such that impedance matching and control of parasitic effects of the RF choke are simultaneously provided wherein an intermediate capacitance formed between the RF choke and the shield is sized to balance against the parasitic effects to provide a desired transmission response over a selected frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.