Method for maintaining register integrity and receive packet protection during ULPI PHY to LINK bus transactions
US7509439B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Apr 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write sequence has been interrupted. In monitoring the register write sequence, the USB transmitter/receiver is operable to discard the register write command if a DIR signal issued by the USB transmitter/receiver is asserted during the register write sequence and/or if an STP signal received by the USB transmitter/receiver is asserted during the register write sequence, where STP may be part of a normal register write operation. The USB transmitter/receiver is further operable to allow the register write sequence to complete if the STP signal and the DIR signal are not asserted during a predetermined period of the register write sequence. The monitoring functions may be implemented in a finite state machine comprised in the USB transmitter/receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.