Patent · US Active

Method and system for testing memory modules

US7509545B2 · kind B2 · utility

0Cited by
2References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2006
Grant dateMar 24, 2009
Priority date
Expiry dateJul 21, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/5602
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system for testing memory modules is disclosed. The system includes a memory module and a connector configured to receive the module. The memory module is configured to operate in two modes: In the first operation mode the module uses a frequency between a low frequency and a high frequency. In the second operation mode, the module uses a frequency lower than the lower frequency. A control circuit is coupled to the connector. The control circuit is configured to apply a control signal to the circuit module when the circuit module is received in the connector. When the circuit module is received in the connector, the control signal is applied. This applied control signal causes the module to operate in the second operation mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.