Circuit layout structure and method
US7509615B2 · kind B2 · utility
3Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2005 |
| Grant date | Mar 24, 2009 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09672
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first portion of the signal wires and adjacent to the second portion of the signal wires, and a second portion placed below the second portion of the signal wires and adjacent to the first portion of the signal wires. The dielectric layer is placed between the first plane and the second plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.