Twin-ONO-type SONOS memory
US7511334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2005 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Dec 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A twin-ONO-type SONOS memory includes a semiconductor substrate having a source region, a drain region and a channel region between the source and drain regions, twin silicon oxide-silicon nitride-silicon oxide (ONO) dielectric layers, a first ONO dielectric layer being on the channel region and the source region and as second ONO dielectric layer being on the channel region and the drain region, and a control gate on the channel region, between the twin ONO dielectric layers, the twin ONO dielectric layers extending along at least lower lateral sides of the control gate adjacent the channel region, wherein the twin ONO dielectric layers extend towards the source and drain regions further than the control gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.