Use of 8-bit or higher A/D for NAND cell value
US7511646B2 · kind B2 · utility
18Cited by
46References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2007 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Mar 30, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method, including computer software, for storing digital information uses multiple NAND flash memory cells. Each memory cell is adapted to receive charge during a write operation to an analog voltage that corresponds to a data value having a binary representation of more than 4 bits. An analog-to-digital converter converts the analog voltage from each memory cell into a digital representation of the analog voltage during a read operation of each cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.