Circuit and method for pre-emphasis in data serialization
US7512193B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2005 |
| Grant date | Mar 31, 2009 |
| Priority date | — |
| Expiry date | Apr 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03343
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit for pre-emphasis in data serialization. The circuit has a signal delayline to incrementally delay a serialized signal, producing a delayed serialized signal. The circuit has a one bit generator circuit, which determines the interval between receipt of one bit and a second bit. The one bit generator circuit has a strobe delayline to incrementally delay a strobe signal, producing a delayed strobe signal, a logical gate to compare the delayed strobe signal with a second strobe signal, and a logical component to determine how long the delayed strobe signal was delayed before it matched the second strobe signal. The circuit also has a comparison gate to detect transition points in the serialized signal by comparing the delayed serialized signal with the serialized signal. The circuit also has a current source to provide increased current for the serialized signal at the detected transition points.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.