Method of manufacturing ferroelectric memory device
US7514272B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2007 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Mar 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a ferroelectric memory device includes: forming an active element on a substrate; forming an interlayer insulating layer on the substrate; forming an opening on the interlayer insulating layer and forming a contact plug inside the opening; forming a foundation layer above the substrate; and laminating, on the foundation layer, a first electrode, a ferroelectric layer, and a second electrode. In this method, the forming of the foundation layer includes: forming a first titanium layer having a thickness less than a depth of a recess; nitriding the first titanium layer into a first titanium nitride layer; forming a second titanium layer on the first titanium nitride layer so as to at least partially fill the recess remaining on the contact plug; nitriding the second titanium layer into a second titanium nitride layer, and polishing a surface of the second titanium nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.