Electroplating solution, method for fabricating multilayer printed wiring board using the solution, and multilayer printed wiring board
US7514637B1 · kind B1 · utility
5Cited by
14References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 4, 2000 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Oct 5, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The objective of present invention is to provide an electroplating solution capable of forming the upper face of a via-hole and the upper face of a conductor circuit in the same layer in approximately the same plane at the time of manufacturing a multilayer printed circuit board. The electroplating solution of the present invention is characterized by containing 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a levelling agent and a brightener.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.