Solid-state imaging device
US7515185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2003 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Feb 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/766
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A solid-state imaging device for enlarging an operating margin of a pixel portion and achieving complete transfer of a signal charge by using a plurality of power supply voltages, wherein a plurality of power supplies having different power supply voltage values are supplied to portions of a semiconductor chip 1. For example, as a first power supply system, a first digital power supply voltage (DVDD1) is supplied from a power supply terminal 45, a first digital ground voltage (DVSS1) is supplied from a power supply terminal 46, a second digital power supply voltage (DVDD2) is supplied from a power supply terminal 47, a second digital ground voltage (DVSS2) is supplied from a power supply terminal 48, a third digital power supply (DVDD3) is supplied from a power supply terminal 49, and a third digital ground voltage (DVSS3) is supplied from a power supply terminal 50, and as a second power supply system, a first analog power supply voltage (AVDD1) is supplied from a power supply terminal 40, a first analog ground voltage (AVSS1) is supplied from a power supply terminal 41, a second analog power supply voltage (AVDD2) is supplied from a power supply terminal 42, and a second analog g…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.