Integrated circuit test system
US7516381B2 · kind B2 · utility
0Cited by
6References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 21, 2006 |
| Grant date | Apr 7, 2009 |
| Priority date | — |
| Expiry date | Jul 6, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31921
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test pattern compressed by an algorithm allowing real-time expansion of data corresponding to each of pins of an LSI is stored in a pattern memory of a pattern generator. A frame processor executes a predetermined program to perform expansion of a test pattern output by the pattern generator by software, generates, based on expanded data, a pulse waveform, and outputs the generated pulse waveform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.