Two-step oxidation process for semiconductor wafers
US7517813B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2005 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Oct 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76202
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An efficient method for the thermal oxidation of preferably silicon semiconductor wafers using LOCOS (local oxidation of silicon) processes is described. The mechanical stresses of the wafers are to be reduced. To this end, an oxidation method is proposed that comprises providing a substrate (1) having a front side (12) to be patterned and a rear side (13). The substrate is oxidized in two steps. In a first step the rear side (13) is covered by a layer (4) that inhibits or hampers the oxidation. During a second step of the oxidation the oxidation-hampering layer (4) is no longer present. During both steps an oxide thickness is obtained on the front side (12) that is greater than an oxide thickness obtained on the rear side (13).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.