Track-and-hold peak detector circuit
US7518414B2 · kind B2 · utility
6Cited by
9References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2005 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Sep 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/088
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A track-and-hold peak detector circuit, which can operate at low input signal frequencies, includes a capacitor to hold a peak voltage of the input signal and logic circuitry that reduces an effect of leakage current into or out of the capacitor, and therefore, provides protection against self-switching of an output signal of the peak detector circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.