Apparatus, system, and method for hardened latch
US7518427B2 · kind B2 · utility
1Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2006 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Dec 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various embodiments include a latch having a node to receive input information, and a first pseudo-inverter with a first input node, a second input node, and an output node to generate output information based on information at the first and second input nodes. The latch may have a feedback circuit to generate feedback information based on at least the output information. The latch may also have a select circuit to selectively transfer the input information and the feedback information to the first and second input nodes. Other embodiments including additional apparatus, systems, and methods are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.