Timing recovery in data communication circuits
US7519137B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2002 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Sep 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03477
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a 1000 BASE-T transceiver, a timing error detector (TED, 5) receives its inputs directly from the output of an ADC (2) and from a decision device (4). Timing recovery is acquired in three stages: a non-decision directed (NDD) stage during which only the output of an ADC (2) are used for acquisition; a stage for acquiring the remote scrambler and predicting symbols; and a decision-directed (DD) stage during which locally predicted symbols are also used for acquisition. Because the timing error detector (TED, 5) does not take inputs from the FFE (3) there is no information about cable length, and so an input of gain from an AGC is used to indicate cable length.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.